The present invention is related to digital synchronization of video signals and, more particularly, to a time base error correction scheme to keep video input and output clocks in synchronization in a multimedia system.
Synchronizing data between a transmitter and receiver is a well known broadcast problem. No matter how finely tuned and calibrated the receiver clock never matches the transmitter clock, exactly. This problem is exacerbated by transmission delays and other interference. This clock synchronization problem is especially sensitive in multimedia based data streams.
FIG. 1 depicts an example of a prior art time based correction problem. A satellite 100 provides an analog video signal represented by arrows 102 to a set top box 104 which includes a digital processor (not shown). The satellite 100 provides the signal at a clock rate that is independent of digital signal processor. The set top box 104 receives the signal and provides a video output signal to a TV set 106. The video output frequency from the set top box 104 is synchronized to, or, derived from a clock generated by an on-board oscillator, i.e. in the set top box 104.
The on-board clock will never provide the video output signal at exactly the same clock rate as that of the satellite 100. The on-board clock frequency will either be too high or too low, i.e., the clock will be too fast or, too slow. Further, over a long period of time, to correct any resulting error and resynchronize the two signals, video frames will have to be dropped if the clock is too fast or, empty frames will have to be produced and inserted into the video output if the clock is too slow.
A related time base error correction problem is encountered in consumer electronics products such as VCRs or laser (video) disk players. A prevalent approach taken in the prior art for correcting time base error of video signals in VCRs and video disk players involves the use of memory buffers. Representative of this prior art are European Patent Application 0 564 272 A2, to Takeshita et al., and U.S. Pat. No. 5,559,812, to Otaki et al. This approach essentially involves capturing a digital sample window of the input signal and inserting and removing data elements thereinto/therefrom. This approach has several significant disadvantages. Foremost amongst these disadvantages is the fact that memory buffers are required and are required to be proportional in size to the degree of jitter present, which imposes a significant hardware cost penalty. Further, inserting and suppressing data degrades the quality of the video signal. Finally, the clock signal itself is not corrected.
In general, this time base error correction problem has several elements that must be addressed. A first element is achieving frequency lock in the system using a digital processor for treatment of multimedia signals. A second element is achieving frequency lock at a particular phase. The difference in phase corresponds to the quantity of the signal stored digitally. This is important because controlling Random Access Memory (RAM) costs is an important factor in overall system cost. A third element occurs when the application must deal with non-continuous shifts in phase. This third element is a consideration when the signal source is mechanical equipment such as a Video Cassette Recorder (VCR).
One approach to solving the above time base error correction problem is to add hardware to slave the video output clock to the video input clock. This approach has been used in combination with analog or digital hardware. However, this approach requires a fixed timing delay calculation which is much more difficult with a digital signal processor. Another approach involves modeling the time base error correction problem as a control theory problem. The video input and output signals can be modeled as a system of partial differential equations with the frequency being modeled as a phase differential. Yet another approach is to use fuzzy logic to model the problem. Using this fuzzy logic approach, look up tables are derived for a variety of different input and output phase ranges. The look up table provides a discrete output frequency for each different input and output phase range. However, because the values are from a table, adjustments are discrete. Further, extensive experimentation for parameterization may be required.
Based on the above and foregoing it can be appreciated that there presently exists a need in the art for a time based correction method for digitally synchronizing video signals that overcomes the above-described disadvantages and shortcomings of the presently available technology. The present invention fulfills this need in the art.
The present invention encompasses a Time Based Correction (TBC) method for digital synchronization of video signals. The time based correction method of the present invention keeps clocks synchronized in a multimedia system in a precise, accurate, and stable manner. The method includes an initialization procedure (tbcInit) that initializes algorithm variables and sets up an initial phase; a measurement procedure (tbcGetPhase) that measures the current phase; and a tracking procedure (tbcAdjust) that makes periodic adjustments to the output clock (VO_CLOCK). In addition to locking clocks, the method of the present invention allows control over input to output latency, reduces buffer requirements and improves image quality. In fact, since the method of the present invention requires only combinatorial logic to make the requisite clock adjustments, it eliminates the need for memory altogether, which constitutes a significant hardware cost savings relative to the presently available technology.